Pre-Silicon Design and Verification

The project concerns the implementation of pre-silicon design technology in PUT. The project results in training materials, workshops and publications. PUT employees and students are involved in the project.

The project concerns the following issues:

• Digital Logic Design using FPGA Platforms
• Embedded Systems Hardware Design Intel FPGA Architectures
• RTL to GDS synthesis

In particular, the following issues are discussed: RTL implementation, modern heterogeneous architectures, synchronous circuits, simulation and debug, static timing analysis, design constraints, memory subsystems, System of Chips (SoCs), System in Package (Sip).